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B.Eng DegreeFaculty of Faculty of Engineering & TechnologyComputer Engineering
CPE 214: Computer Organization & Assembly Language
Von Neumann/Harvard, ISA, RISC vs CISC, ARM/x86 assembly programming, addressing modes, stack frames, and CPU datapath.
Course Overview
Von Neumann/Harvard, ISA, RISC vs CISC, ARM/x86 assembly programming, addressing modes, stack frames, and CPU datapath. Curriculum Structure & Core Modules: • 1. Computer Architectural Evolution: From Relay Computers to Modern Multi-core CPUs • 2. Von Neumann vs Harvard...
What You'll Learn
- Differentiate Von Neumann vs Harvard architectures and RISC vs CISC instruction sets.
- Write, assemble, link, and debug low-level assembly language routines for ARM or x86 processors.
- Translate high-level control structures, loops, and function calls into assembly machine idioms.
- Manage CPU registers, stack frames, calling conventions (ABI), and parameter passing.
- Trace instruction fetch-decode-execute cycles through micro-architectural CPU datapath registers.
Requirements
- Completion of CPE 207 and CPE 116.
Degree Programme Curriculum Context
This course is a curriculum unit of the Bachelor of Engineering (B.Eng.) in Computer Engineering degree framework in Nigeria.
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Course Curriculum
Open-access academic curriculum. All foundational lectures available to read free.
8 Chapters
•16 Lecture
•24h
1. Computer Architectural Evolution: From Relay Computers to Modern Multi-core CPUs: Theoretical Foundations, Mathematical Modeling & System Architecture
CPE 214 • 200 Level • Computer Engineering Chapter 1: Computer Architectural Evolution: From Relay Computers to Modern Multi-core CPUs — Theoretical Foundations, Mathematical Modeling & System Architecture Course: CPE 214: Computer Organization & Assembly Language Curriculum: NUC-CCMAS-CPE Accreditation: COREN-CPE-OBE Standard: IEEE/ACM-CE2024 1. Pedagogical Scope & Behavio...
2. Computer Architectural Evolution: From Relay Computers to Modern Multi-core CPUs: Worked Engineering Problems, Design Computations & Simulation Protocols
CPE 214 • 200 Level • Computer Engineering Chapter 1: Computer Architectural Evolution: From Relay Computers to Modern Multi-core CPUs — Worked Engineering Problems, Design Computations & Simulation Protocols Course: CPE 214: Computer Organization & Assembly Language Curriculum: NUC-CCMAS-CPE Accreditation: COREN-CPE-OBE Practice: COREN ERM / IEEE Design Standards 1. Comprehens...
1 hour 30 minutes
3. Chapter 1 Formative Assessment: Computer Architectural Evolution: From Relay Computers to Mo
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Instructor
PAMCET Learning Team
Institutional Course Curation · PAMCET
Qualifications:
PAMCET Learning Team — Institutional Course Curation, Digitpen Hub LtdMy Skills:
- Curriculum Curation
- Course Content Review
- Learning Outcome Design
- Course Publishing & Quality Assurance
- Platform Content Operations
Reviews
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Free
Course Includes
8 Chapters
16 Lectures
2 - 4 weeks
Skill Level beginner
Taught in English
Lifetime Access
Certification of Completion
Category: University - Computer Engineering
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